Checklist: Electronic Hardware Equipment and Product Design Development for Manufacturing (DfM)

Checklist: Electronic Hardware Equipment and Product Design Development for Manufacturing (DfM)

When outsourcing electronics product design, one effective way to evaluate design contractor performance is to review their past projects and new product design manufacturing processes and specs management. Quality design contractors should be able to identify design flaws early on to help minimize costly development iterations. Detailed specs below are guidelines. Your needs may vary.

  1. Design / Component Selection
    a. Verify components are available in production quantities
    b. Minimize number, and number of, different components
    c. Confirm no end-of-life (EOL) components designed in
    d. Minimize sole-source devices / components
    e. Multiple / alternative manufacturers specified for all components
    f. Second sources checked for mechanical and electrical fit
    g. Component tolerance issues identified and evaluated
    h. Component temperature ranges considered
    i. Ball grid array (BGA) vs fine-pitch quad flat pack (QFP) considerations
    j. Trim pots eliminated where possible
    k. Design for environment: for recycle, re-use, repair
  2. General Board Layout Considerations
    a. Visible orientation marks on silkscreen layer for all polarized components
    b. Polarized components in proper directions
    c. Layer numbers visible on printed circuit board (PCB) or break-offs. Names on artwork (Read: Six (6) PCB design mistakes to avoid)
  3. Board Assembly Manufacturing Processes
    a. Workmanship requirements established (e.g. IPC, military...)
    b. Number of processes identified and minimized
    c. Hand soldering minimized
    d. Hand insertion and assembly minimized
  4. Through-Hole Components
    a. Non-plated tooling holes for through-hole automation
    b. Drill sizes: lead diameter + 0.015" for auto-inserted through-hole. (May suggest ‘finished hole’ size instead so contractor determines which size drill to use to allow for plate up)
    c. Dual in-line package (DIP), axial and radial inserted components (note some exceptions on non-plated, single-sided boards)
    d. Customary for DIP socket drill holes to be 0.040"
    e. Orientation of auto-insert components at 0°, 90°, 180°, and 270°
    f. DIP components oriented same way on volume boards
    g. Axial components oriented same way on volume boards
    h. TO-92 (widely used semiconductor package) transistor lead layouts spaced 0.100" in-line, pad-to-pad
    i. No stand-up axial components
    j. Minimum 0.010" annular rings on through-hole pads (ring of exposed solder or copper around through hole)
  5. Surface Mount Technology (SMT) Land Patterns
    a. Fine-pitch land patterns at 60% pad width/pitch
    b. Land patterns match to actual physical components
    c. Land patterns fall in with DFM optimization
    d. No natural bridges on fine-pitch SMT
    e. Non-solder mask defined (NSMD) pads for BGAs
  6. Wave-Soldered Bottom Side SMT Components
    a. Confirm lower-yielding process required
    b. Bottom-side SMT wave land patterns optimized
    c. Component orientation optimized for waved SMT components (e.g. SOICs, SOT-23s and discreet packaging (DPAKs) )
    d. 4-sided SMT and fine-pitch SMT not soldered
    e. Minimum component-to-component spacing equal to height of tallest of two components
    f. Other wave solder shadowing considerations to prevent ‘skips’ (Surface tension of solder is not broken when waving, therefore solder cannot properly wet interfaces to form solder joints)
    g. No SMT components on bottom within DIP clinch head footprint on mixed-technology PCBs
  7. Hardware
    a. PCB includes stainless steel to prevent rusting, repel solder
    b. Tinned, plastic encapsulated microcircuits (PEMs), etc…will solder to board
    c. Phillips or allen-head screws for ease of assembly
    d. Sil pad washers on power devices where required
    e. Identify rivscrew use, where possible
    f. Non-plated mounting holes, without pads, where/if possible
  8. Board Mechanicals
    a. Three (3) fiducial marks 0.060" on each side with SMT via-holes covered with soldermask. Normal strategy except for certain in-circuit / combinational test-enabled (ICT) designs
    b. Layer stack-up identification on board or break-off tabs
    c. Component-to-edge-of-board considerations identified
    d. Panelization or break-offs discussed with ODM partner(s)
  9. Printed Circuit Board (PCB) Specifications
    a. Optimum board finish specified (e.g. gold flash for boards with fine ball grid array (FBGA) or QFPs 0.020" pitch and smaller)
    b. Boards specified for bare-board test (BBT)
    c. Gerber files generated in proper format (with embedded aperture lists) including high level commands and controls that let the creator of the Gerber data precisely specify photoplot
    d. No soldermask between 0.020", or smaller, fine-pitch
    e. Controlled impedance specified where required
    f. Special board materials, construction specified for high-frequency boards
    g. Liquid photo-imageable soldermask, standard
    h. SMT paste layer(s) with no fiducial or other pads
  10. Test Strategy
    a. Test plan established before design started
    b. Failure modes considered
    c. Identify self-test, manual functional test, all boundary-scan board test, automated functional test, ICT
    d. Avoid test turrets and hooks (use SMT loops if required)
  11. In-Circuit Test Mini-Checklist
    a. Schematics reviewed by EMS, ODM or design house test engineers prior to board layout
    b. Enablers for integrated circuits (IC) and oscillators - with resistor pull-downs
    c. Test pads for unused IC pins for complex ICs
    d. Boundary scan enabled devices (note special chaining, layout requirements)
    e. One test pad per net - accessible from the bottom side
    f. Additional pads for power nets: 0.5 A per test point
    g. Determine minimum test pad (0.030"?), sometimes 0.040" square preferred
    h. Okay to use through-hole leads as test points
    i. Two (2) tooling holes required: diagonally opposite, minimum 0.093", 0.125" (non-plated preferred)
    j. Use of 0.050" and 0.075" center-center test points minimized or eliminated, 0.100" spacing preferred
    k. Pads with via-holes used as test points have no soldermask over them, other vias masked
    l. ICT tooling hole to test pad clearance 0.125"
    m. Board edge to test pad clearance 0.100"
    n. On-board batteries have disconnect jumper

To help determine your outsourcing product goals and objectives, try this outsourcing calculator before detailed cost pricing discussions with electronics manufacturing services (EMS) providers.

As your program ramps production, meetings with EMS providers will usually include at least the following functions from both sides (OEM and EMS):

  • EMS provider quality engineer
  • EMS NPI process engineer
  • EMS test engineer
  • EMS production process engineer
  • EMS component engineer
  • OEM manufacturing test engineer
  • OEM quality engineer
  • OEM program management

For clarity on the difference between OEM and EMS, I suggest reading about the differences between OEM companies vs EMS, CM, CEM, design houses. If you are already in the phase deciding to work with a contract electronics provider, read this article on effective request-for-quote (RFQ) best practices in EMS manufacturing industry.

In addition to the checklist above, a more detailed plan for OEM electronics new product development programs when sourcing EMS manufacturing services is available here.

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